Information
This page has information about me and content that might be of interest to people reading this site:
Mailing Address:
Joint BioEnergy Institute
5885 Hollis Street, Fourth Floor
Emeryville, CA 94608
Phone (cell): 510-434-4978
Office Fax: 510-486-4252
Office: JBEI, 4th Floor (4220-B)
E-mail: densmore at eecs dot berkeley dot edu
My curriculum vitae, research statement, and teaching statement are all available on request.
Advice to future grad students (link on the side menu). Maybe this will be helpful to someone:)
Berkeley CAD prelim notes:
- Mine (use at your own risk; not fully checked)
- Dave Chinnery
- Abhijit Davare
Here is a link to a .pdf file from the Empowering Leadership Alliance with an interview I did (ELInterview).
Short Professional Bio:
Douglas Densmore received his Bachelors of Science in Engineering (Computer Engineering) from the University of Michigan in April 2001. He received his Masters of Science in Electrical Engineering in May 2004 and his PhD in Electrical Engineering in May 2007 (both from UC Berkeley).
His industry experience includes four+ summers with Intel Corporation and summer research positions at Cypress Semiconductor and Xilinx Research Labs. He is currently a member of the Gigascale Systems Research Center (GSRC) and the Center for Hybrid and Embedded Software Systems (CHESS) at UC Berkeley.
He is currently a UC Chancellor’s post doctoral researcher at UC Berkeley and the team leader of UC Berkeley’s software tools team for MIT’s International Genetically Engineered Machine Competition (iGEM). His background and interests are in Computer Architecture, Embedded Systems, Logic Synthesis, Digital Logic Design, System Level Design, and Synthetic Biology.
Longer Professional Bio:
Douglas Densmore received his Bachelors of Science in Engineering (Computer Engineering) from the University of Michigan in April 2001. He received his Masters of Science in Electrical Engineering in May 2004 from the University of California at Berkeley. His masters thesis was entitled, “Platform Based Reconfigurable Architecture Exploration via Boolean Constraints” and demonstrated how Boolean Satisfiability could be used to produce configurations for programmable hardware. He received his PhD in Electrical Engineering from UC Berkeley as well in May 2007. His PhD thesis, entitled “A Design Flow for the Development, Characterization, and Refinement of System Level Architecture Services”, explored how electronic system level design methodologies can be abstract and modular while at the same time remaining accurate and efficient.
His industry experience includes four+ summers with Intel Corporation where he was involved in pre-silicon design efforts regarding chipset development, post-silicon validation of the Pentium 4 microprocessor, and chipset software validation. He has also worked as a researcher at Cypress Semiconductor and Xilinx Research Labs. He is currently a member of the Gigascale Systems Research Center (GSRC) and the Center for Hybrid and Embedded Software Systems (CHESS) at UC Berkeley. He has published work regarding a method of successive refinement verification of electronic systems, taxonomies of EDA design tools, and algebraic frameworks for the manipulation of functional design descriptions to expose computational parallelism. In addition he has a US patent pending regarding data characterization of programmable devices (such as field programmable gate arrays).
He is currently a UC Chancellor’s post doctoral researcher at UC Berkeley studying under Prof. Alberto Sangiovanni-Vincentelli. His research area is in the development of System Level Design methodologies for electronic systems. Specifically, architecture modeling and refinement verification. He is also the team leader of UC Berkeley’s software tools team for MIT’s International Genetically Engineered Machine Competition (iGEM). In 2008, the team won “best software tool” and was awarded a gold medal for the development of Clotho. His background and interests are in Computer Architecture, Embedded Systems, Logic Synthesis, Digital Logic Design, System Level Design, and Synthetic Biology.